Synopsys

Full briefing

Synopsys, Inc. (NASDAQ: SNPS) is headquartered in Sunnyvale, California, and is the world's largest EDA company by revenue (~$6 billion in FY2024). Founded in 1986 by Aart de Geus and David Gregory, Synopsys has grown through decades of acquisitions into the dominant provider of digital chip design tools. In 2024, Synopsys announced the acquisition of Ansys (simulation software) for $35 billion, broadening its scope to include systems simulation and multiphysics modeling. Synopsys's core EDA products define the digital chip design flow: Design Compiler and Fusion Compiler handle RTL synthesis (converting hardware description to gate-level logic); IC Compiler 2 and Fusion Design Platform handle physical implementation (floorplanning, placement, routing); PrimeTime is the de facto industry standard for static timing analysis — virtually every advanced chip is timing-signed-off using PrimeTime; VCS and Verdi handle functional simulation and debug. For verification, Synopsys's Verification Continuum platform (including Formality for formal equivalence and ZeBu for hardware emulation) is used by nearly all major chip designers. Synopsys also provides semiconductor IP cores (including DesignWare USB, PCIe, DDR, and HDMI interface IP) that chip designers embed rather than design from scratch — making Synopsys both an EDA vendor and a chip IP competitor to Arm Holdings in specific domains. Export control context: Synopsys's tools were explicitly restricted to Chinese entities in the October 2022 BIS rule update. China has been investing heavily in domestic EDA alternatives (EDA2 consortium, Empyrean Technology, Primarius Technologies) but domestic tools remain 3–5 years behind Cadence/Synopsys at advanced nodes. The EDA export control is considered by analysts to be the most effective single constraint on China's ability to close the semiconductor design gap.