Biren Technology

Full briefing

Biren Technology (壁仞科技) was founded in Shanghai in 2019 by Zhang Wen, a veteran of AMD and Microsoft, with a founding team that included engineers from NVIDIA, AMD, Qualcomm, Arm, and other semiconductor companies. The company raised over $700 million in venture funding through 2022, making it one of the best-capitalized domestic Chinese AI chip startups at the time, with investors including CICC Capital, Primavera Capital, and CITIC Private Equity. Biren's BR100 GPU, unveiled in August 2022, was its flagship product and represented a technically ambitious attempt to build a performance-competitive AI accelerator. The BR100 was designed on TSMC's 7nm process (N7) and featured 77 billion transistors on two chiplets connected via TSMC's CoWoS advanced packaging. Biren claimed performance specifications of 256 TOPS (tera-operations per second) for INT8 inference and 128 TFLOPS for BF16 training, positioning it as competitive with NVIDIA's A100 in certain workloads. The chip was paired with HBM2e memory providing 3.2 TB/s of bandwidth — also TSMC-packaged. The Entity Listing in October 2022 was catastrophic for Biren's technology roadmap. The BIS placed Biren on the Entity List on October 7, 2022, as part of the sweeping semiconductor export control package that also included SMIC (for advanced nodes), Yangtze Memory Technologies, and other Chinese companies. Entity Listing means that any US-regulated technology — including TSMC's process technology, ASML EUV equipment, Cadence and Synopsys EDA tools, and NVIDIA's CUDA stack — cannot be supplied to Biren without an individual export license, which are presumed denied. Since TSMC operates under US technology jurisdiction (its manufacturing equipment and IP contain US-origin technology), it immediately ceased accepting new Biren tape-outs after the listing. Biren's response to the Entity Listing has been to pivot toward SMIC, China's largest domestic foundry. SMIC's most advanced available process for commercial production is N+2 (approximately equivalent to 7nm in density terms), though SMIC lacks EUV lithography and achieves comparable density through multi-patterning immersion lithography at higher cost and lower yield than TSMC 7nm. Biren's BR200 chip — the successor to the BR100 — is targeted for SMIC N+2 production. The performance gap versus TSMC-fabbed chips will be meaningful given SMIC's process disadvantage, but a functional SMIC-fabbed BR200 would still be a significant milestone for China's domestic GPU ecosystem. Biren's situation illustrates the structural vulnerability of China's AI chip startups. Prior to the Entity Listing, Biren was building a chip that could have narrowed China's AI hardware gap with the West; after the listing, it was effectively cut off from the world's most advanced foundry and forced to redesign for a less capable process. The EDA tool dependency is also significant: Cadence and Synopsys, both US companies, control the majority of advanced chip design tools, and their products are also covered by export controls on Entity Listed companies, complicating Biren's ability to execute complex physical design at advanced nodes even on SMIC.